 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| standard power data sheet rev. 1.0, 2011-02-07 ifx80471 step-down dc/dc controller ifx80471skv ifx80471skv50
data sheet 2 rev. 1.0, 2011-02-07 ifx80471 table of contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.1 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.2 typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 detailed circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 pfm/pwm step-down regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.2 battery voltage sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.3 undervoltage reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.2 output voltage at adjustable version - feedback divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.3 si_enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.3.1 battery sense comparator - voltage divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.4 undervoltage reset - delay time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.5 100% duty-cycle operation and dropout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.6 sync input and frequency control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.7 shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.8 buck converter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.8.1 buck inductance (l1) select ion in terms of ripple current: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.8.2 determining the current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.8.3 pfm and pwm thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.8.4 buck output capacitor (cout) selectio n: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 7.8.5 input capacitor (cin1) selection: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8.6 freewheeling diode / catch diode (d1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8.7 buck driver supply capacitor (cbds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8.8 input pi-filter components for reduced eme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8.9 frequency compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.9 components recommendation - overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7.10 layout recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table of contents pg-dso-14 type package marking ifx80471skv pg-dso-14 i80471v ifx80471skv50 pg-dso-14 i80471v50 data sheet 3 rev. 1.0, 2011-02-07 step-down dc/dc controller ifx80471 1overview features ? input voltage range from 5v up to 60v ? output voltage: 5v fixed or adjustable ? output voltage accuracy: 3% ? output current up to 2.3a ? 100% maximum duty cycle ? less than 120a quiescent current at low loads 1) ? 2a max. shutdown current at device off (ifx80471skv) ? fixed 360khz switching frequency ? frequency synchronization input for external clocks ? current mode control scheme ? integrated output undervoltage reset circuit 2) ? on chip low battery detector (on chip comparator) ? temperature range -40c to 125 c ? green product (rohs compliant) 1) dependent on external component 2) for the adjustable version ifx80471skv the reset f unctionality is available for output voltages > 7v for automotive and transportation applications, please refe r to the infineon tle and tlf voltage regulator series. description the ifx80471 step-down dc-dc switching controllers provide high efficiency over loads ranging from 1ma up to 2.3a. a unique pwm/pfm control scheme operates with a duty cycle up to 100% resulting in a very low dropout voltage. this control scheme eliminat es minimum load requirements and r educes the supply current under light loads to 120a, depending on dimensioning of extern al components. in addition the adjustable version ifx80471skv can be shut down via the enable input redu cing the input current to <2a. the ifx80471 step-down controllers drive an external p-channel mosfet, allowing design fl exibility for applications up to 11.5w of output power at 5v output voltage. the ifx80471 offers high s witching frequency of up to 360khz as well as operation in continuous-conduction mode and allows the usage of tiny surfac e-mount inductors. output capacitor requirements are also reduced, mini mizing pc board area and system costs. the output voltage of the ifx80471skv50 is preset to 5v and is adjustable for the ifx80471skv. the ifx80471skv50 features a reset function with a threshold between 4.5v and 4.8v, including a small hysteresis of typ. 50mv. input voltages of both ifx80471 versions can be up to 60v. data sheet 4 rev. 1.0, 2011-02-07 ifx80471 block diagram 2 block diagram figure 1 block diagram internal power supply and biasing battery sense and undervoltage reset voltage reference block pwm / pfm regulator clock generator so ro vout g drv sync si ena ble si- gnd gnd vs ifx80471skv driver comp cs fb bds ifx80471 pin configuration data sheet 5 rev. 1.0, 2011-02-07 3 pin configuration 3.1 pin assignment figure 2 pin configuration 3.2 pin definitions and functions pin symbol function 1 enable active-high enable input (only adjustable version, ifx80471skv) for the device. the device is shut down when enable is driven low. in this shut down-mode the reference, the output and th e external mosfet are turned off. connect to logic high for normal operation. 1 si_enable active-high enable input (only 5v ve rsion, ifx80471skv50) for si_gnd input. si_gnd is switched to high impedance wh en si_enable is low. high level at si_enable connects si_gnd to gnd with low impedance. so is undefined when si_enable is low. 2fb feedback input. 1. for adjustable version (i fx80471skv) connect this pi n to an external voltage divider from the output to gnd (see chapter 7.2 ). 2. for the 5v fixed output voltage versio n (ifx80471skv50) the fb is connected to an on-chip voltage divider supplied internally by vout. it does not have to be connected externally to the output. 3vout buck output voltage input. input for the internal supply. connect always to the output of the buck converter (output capacitor). 8 9 10 11 12 7 6 5 4 3 2 13 1 14 enable / si_enable fb vout gnd sync si_gnd si cs vs gdrv bds ro so comp data sheet 6 rev. 1.0, 2011-02-07 ifx80471 pin configuration 4gnd ground connection. analog signal ground. 5 sync input for external frequency synchronization. an external clock signal connected to this pin allows switching frequency synchronization of th e device. the internal oscilla tor is clocked then by the frequency applied at the sync input. 6 si_gnd si-ground input. ground connection for si comparator resi stor divider. depending on si_enable this input is switched to high impedance or low ohmic to gnd. 7si sense comparator input. input of the low-battery comparator. this input is compared to an internal 1.25v reference where so gives the result of the comparison. can be used for any comparison, not necessarily as battery sense. 8 comp compensation input. connect via rc-compensation network to gnd. 9so sense comparator output. open drain output from si comparator at the adjustable version (ifx80471skv), pull down structure with an internal 20k pull up resistor to vout at the 5v version (ifx80471skv50). 10 ro reset output. open drain output from undervoltage reset comparator at the adjustable version (ifx80471skv), pull down structure with an internal 20k pull up resistor to vout at the 5v version (ifx80471skv50). 11 bds buck driver supply input. connect a ceramic capacitor between bds and vs to generate clamped gate- source voltage to supply the driver of the pmos power stage. 12 gdrv gate drive output. connect to the gate of the external p-channel mosfet. th e voltage at gdrv swings between the levels of vs and bds. 13 vs device supply input. connect a 220nf ceramic cap close to the pin in addition to the low esr tantalum input capacitance. 14 cs current-sense input. connect current-sense resistor between vs and cs. the voltage drop over the sense-resistor determines the peak current flowing in the buck circuit. the external mosfet is turned off when the peak current is exceeded. pin symbol function ifx80471 general product characteristics data sheet 7 rev. 1.0, 2011-02-07 4 general product characteristics 4.1 absolute maximum ratings absolute maximum ratings 1) all voltages with respect to ground, positive curr ent flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max. device supply input vs 4.1.1 voltage v vs -0.3 61 v ? 4.1.2 current i vs ???? current sense input cs 4.1.3 voltage v cs -0.3 61 v | v vs - v cs | < 0.3v 4.1.4 current i cs ???? gate drive output gdrv 4.1.5 voltage v gdrv ? 0.3 61 v -0.3v < | v vs - v gdrv | < 6.8v; -0.3v < | v bds - v gdrv | < 6.8v 4.1.6 current i gdrv ? ? ? limited internally buck driver supply input bds 4.1.7 voltage v bds ? 0.3 61 v -0.3v < |v vs - v bds | < 6.8v 4.1.8 current i bds ???? feedback input fb 4.1.9 voltage v fb ? 0.3 6.8 v ? 4.1.10 current i fb ???? enable input si_enable 4.1.11 voltage v si_enable ? 0.3 61 v ifx80471skv50 4.1.12 current i si_enable ???? si-ground input si_gnd 4.1.13 voltage v si_gnd ? 0.3 61 v ? 4.1.14 current i si_gnd ???? enable input enable 4.1.15 voltage v enable ? 0.3 61 v ifx80471skv 4.1.16 current i enable ? ? v ? sense comparator input si 4.1.17 voltage v si ? 0.3 61 v ? 4.1.18 current i si ? ? v ? sense comparator output so 4.1.19 voltage v so ? 0.3 6.8 v ? 4.1.20 current i so ? ? v limited internally data sheet 8 rev. 1.0, 2011-02-07 ifx80471 general product characteristics note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. buck output voltage input vout 4.1.21 voltage v vout ? 0.3 15 v ifx80471skv 4.1.22 voltage v vout ? 0.3 6.8 v ifx80471skv50 4.1.23 current i vout ? ? v ? compensation input comp 4.1.24 voltage v comp ? 0.3 6.8 v ? 4.1.25 current i comp ? ? v ? reset output ro 4.1.26 voltage v ro ? 0.3 6.8 v ? 4.1.27 current i ro ? ? v limited internally frequency synchronization input sync 4.1.28 voltage v sync ? 0.3 6.8 v ? 4.1.29 current i sync ? ? v ? temperatures 4.1.30 junction temperature t j -40 150 c ? 4.1.31 storage temperature t stg -50 150 c ? esd susceptibility 4.1.32 esd resistivity pin v out v esd_vout -1.5 1.5 kv hbm 2) 4.1.33 esd resistivity all pins except v out v esd -2 2 kv hbm 2) 4.1.34 esd resistivity to gnd v esd -500 500 v cdm 3) 1) not subject to production test, specified by design. 2) esd susceptibility, hbm acco rding to eia/jesd 22-a114b 3) esd susceptibility, charged device model ?cdm? eia/jesd22-c101 or esda stm5.3.1 absolute maximum ratings (cont?d) 1) all voltages with respect to ground, positive curr ent flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max. ifx80471 general product characteristics data sheet 9 rev. 1.0, 2011-02-07 4.2 functional range [ note: within the functional or operating range, the ic operat es as described in the circuit description. the electrical characteristics are specif ied within the conditions given in th e electrical char acteristics table. table 1 pos. parameter symbol limit values unit conditions min. max. 4.2.1 supply voltage range v vs 560v? 4.2.2 output voltage adjust range ifx80471skv v out 7 15 v ifx80471skv 4.2.3 sense resistor r sense 10 47 m calculation see chapter 7 4.2.4 pmos, on+off delay t on+off delay ? t min -300 1) 1) a too high pmos on+off delay might cause an instable output voltage ns t min = v vout /( v vs * f sw ) 4.2.5 buck driver supply capacitor c bds 220 ? nf ? 4.2.6 buck inductance l 1 22 100 h ? 2) 2) a recommended minimum value for l 1 is 47h 4.2.7 buck output capacitor c out 100 ? f ? 4.2.8 junction temperature t j -40 125 c? data sheet 10 rev. 1.0, 2011-02-07 ifx80471 general product characteristics 4.3 thermal resistance note: this thermal data was generated in accordance wit h jedec jesd51 standards. fo r more information, go to www.jedec.org . pos. parameter symbol limit values unit conditions min. typ. max. 4.3.1 junction to soldering point 1) 1) not subject to production test, specified by design. r thjsp ?50?k/w? 4.3.2 junction to ambient 1) r thja ? 140 ? k/w footprint only data sheet 10 rev. 1.0, 2011-02-07 ifx80471 electrical characteristics 5 electrical characteristics 5.1 electrical characteristics electrical characteristics: power 5v < v vs < 48v; t j = -40 c to +125 c, all volt ages with respect to ground, po sitive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. current consumption 1) ifx80471skv50 5.1.1 current consumption of vs i vs ? 80 150 a v vs = 48v; pfm mode ? 70 85 a v vs = 13.5v; pfm mode; t j = 25 c 5.1.2 current consumption of si_enable i si_enable ? 930a v vs = 48v; v si_enable = 48v; pfm mode 5.1.3 current consumption of vout i vout ? 95 130 a v si_enable = l; v vout = 5.5v ; v vs =13.5v; pfm mode; t j = 25c ? 140 220 a v si_enable = h; v vout = 5.5v; v vs = 13.5v; v si > v si, high ; pfm mode 5.1.4 current consumption of si i si ? 0.2 0.5 a v si_enable = h; v vs = 13.5v; v si = 10v; pfm mode current consumption 1) ifx80471skv (variable) 5.1.5 current consumption of vs i vs ? 80 150 a v vs = 48v; v enable = h; pfm mode; v out > 7v ? 70 85 a v vs = 13.5v; v enable = h; pfm mode; t j = 25 c; v out > 7v 5.1.6 current consumption of vs ? 2a v enable = 0v; t j < 105c 5.1.7 current consumption of enable i en ? 930a v vs = 48v; v enable = h; pfm mode ifx80471 electrical characteristics data sheet 11 rev. 1.0, 2011-02-07 5.1.8 current consumption of vout i vout ? 140 220 a v out = 8v; v vs = 13.5v; v enable = h; v si > v si, high ; pfm mode 5.1.9 current consumption of si i si ? 0.2 0.5 a v vs = 13.5v; v enable = h; v si = 10v; pfm mode; t j = 25c 5.1.10 current consumption of fb i fb ? 0.2 0.5 a v vs = 13.5v; v fb = 1.25v; v enable = h; pfm mode; t j = 25c buck controller 5.1.11 output voltage v vout 4.85 5.00 5.15 v ifx80471skv50; v vs =13.5v& 48v; pwm mode i out = 0.5 to 2a; r sense = 22m ; r m1 = 0.25 ; r l1 = 0.1 4.75 5.00 5.25 v ifx80471skv50; v vs = 24v; pfm mode; i out = 15ma; r sense = 22m ; r m1 = 0.25 ; r l1 = 0.1 ; 5.1.12 fb threshold voltage v fb, th 1.225 1.25 1.275 v ifx80471skv 5.1.13 output voltage v vout 9.7 10.0 10.3 v ifx80471skv; calibrated divider, see chapter 7.2 ; v vs = 13.5v & 48v; i out = 0.5 to 2a; pwm mode; r sense = 22m ; r m1 = 0.25 ; r l1 = 0.1 ; 9.5 10.0 10.5 v ifx80471skv; calibrated divider, see chapter 7.2 ; v vs = 24v; i out = 15ma; pfm mode; r sense = 22m ; r m1 = 0.25 ; r l1 = 0.1 ; electrical characteristics: power (cont?d) 5v < v vs < 48v; t j = -40 c to +125 c, all volt ages with respect to ground, po sitive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. data sheet 12 rev. 1.0, 2011-02-07 ifx80471 electrical characteristics 5.1.14 buck output voltage adjust range v vout v fb, th ? 7 v ifx80471skv, supplied by v s only, complete current to supply the ic drawn from vs, no reset function 2) 7 ? 15 v ifx80471skv, current to supply the ic drawn from vs and vout, as specified 2) 5.1.15 buck output voltage accuracy v vout 0.97 * v out_nom ? 1.03 * v out_nom ifx80471skv; pwm mode 2) 5.1.16 buck output voltage accuracy v vout 0.95 * v out_nom ? 1.05 * v out_nom ifx80471skv, pfm mode 2) 5.1.17 line regulation | v vout | ?? 35 mv ifx80471skv50, v vs = 9 v to 16v; i out = 1a; r sense = 22m ; pwm mode ?? 50 mv ifx80471skv50, v vs = 16 v to 32v; i out = 1a; r sense = 22m ; pwm mode 5.1.18 line regulation v vout / v vout ?? 2.5 % ifx80471skv, v vs = 12 v to 36v; v vout =10v i out = 1a; r sense = 22m ; pwm mode 5.1.19 load regulation v vout / i load ? 40 ? mv/ a ifx80471skv50; i out = 0.5a to 2a; v vs = 5.8v & 48v; r sense = 22m ? 8* v out_nom / v ? mv/ a ifx80471skv; i out = 0.5 to 2a; v vs = 13.5v & 48v; r sense = 22m 5.1.20 gate driver, pmos off v vs ? v gdrv 0?0.2v v enable/si_enable = 5 v; c bds = 220 nf; c gdrv = 4.7nf 5.1.21 gate driver, pmos on v vs ? v gdrv 6?8.2v v enable/si_enable = 5 v; c bds = 220 nf; c gdrv = 4.7nf 3) 5.1.22 gate driver, uv lockout v vs ? v bds 2.75 ? 4 v decreasing ( v vs - v bds ) until gdrv is permanently at vs level 5.1.23 gate driver, peak charging current i gdrv ? 1 ? a pmos dependent; 2) 5.1.24 gate driver, peak discharging current i gdrv ? 1 ? a pmos dependent; 2) electrical characteristics: power (cont?d) 5v < v vs < 48v; t j = -40 c to +125 c, all volt ages with respect to ground, po sitive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. ifx80471 electrical characteristics data sheet 13 rev. 1.0, 2011-02-07 5.1.25 gate driver, gate voltage, rise time t r ?4560ns v enable/si_enable = 5 v; c bds = 220 nf; c gdrv = 4.7nf 5.1.26 gate driver, gate voltage, fall time t f ?5065ns v enable/si_enable = 5 v; c bds = 220 nf; c gdrv = 4.7nf 5.1.27 peak current limit threshold voltage v lim = v vs - v cs 50 70 90 mv 5.1.28 oscillator frequency f osc 290 360 420 khz pwm mode only 5.1.29 maximum duty cycle d max 100 ??% pwm mode only 5.1.30 minimum on time t min ? 220 400 ns pwm mode only 5.1.31 sync capture range f sync 250 ? 530 khz pwm mode only 5.1.32 sync trigger level high v sync,h 4.0 ??v 2) 5.1.33 sync trigger level low v sync,l ?? 0.8 v 2) reset generator 5.1.34 reset headroom v rt,head 80 ??mv ifx80471skv50; v out ( v s =6v, i load =1a) - v vout,rt 5.1.35 reset threshold v vout, rt 4.5 4.65 4.8 v ifx80471skv50; v vout increasing/decreasing 5.1.36 reset threshold hysteresis v vout, rt ? 50 ?mv ifx80471skv50 2) 5.1.37 reset threshold v fb, rt ? 1.12 ?v ifx80471skv; v vout decreasing ? 1.17 ?v ifx80471skv; v vout increasing 5.1.38 reset output pull up resistor r ro 10 20 40 k ifx80471skv50; internally connected to v out 5.1.39 reset output high voltage v ro, h 0.8 * v vout ??v ifx80471skv50; i ro = 0ma 5.1.40 reset output low voltage v ro,l ?0.20.4v i ro, l = 1ma; 2.5v < v vout < v rt ? 0.2 0.4 v i ro, l = 0.2ma; 1v < v vout < 2.5v 5.1.41 reset delay time t rd 17 21 25 ms ifx80471skv 70 82 100 ms ifx80471skv50 5.1.42 reset reaction time t rr ??10s 2) overvoltage lockout 5.1.43 overvoltage threshold v vout, ov ? v out_nom + 100 ?mv ifx80471skv50; v vout increasing 5.1.44 overvoltage threshold v fb, ov ? v fb,th,nom + 20 ?mv ifx80471skv; v vout increasing electrical characteristics: power (cont?d) 5v < v vs < 48v; t j = -40 c to +125 c, all volt ages with respect to ground, po sitive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. data sheet 14 rev. 1.0, 2011-02-07 ifx80471 electrical characteristics enable input 5.1.45 enable on-threshold v enable,on 4.5 ? ? v 5.1.46 enable off-threshold v enable,off ??0.8v si_enable input 5.1.47 enable on-threshold v enable,on 4.5 ? ? v 5.1.48 enable off-threshold v enable,off ??0.8v si_gnd input 5.1.49 switch on resistance r sw 50 100 230 v si_enable = 5v; i si_gnd = 3ma battery voltage sense 5.1.50 sense threshold v si, low 1.22 1.25 1.28 v v vs decreasing 5.1.51 sense threshold v si, high ?1.33? vv vs increasing 5.1.52 sense threshold hysteresis v si, hys 30 80 120 mv 5.1.53 sense output pull up resistor r so 10 20 40 k ifx80471skv50; internally connected to v vout 5.1.54 sense out ou tput high voltage v so,h 0.8 * v vout v i so,h =0ma 5.1.55 sense out output low voltage v so,l 0.2 0.4 v i so,l = 1ma; 2.5v < v vout ; v si <1.13v 0.4 v vout v i sol =0.2ma; 1v < v vout < 2.5v; v si <1.13v thermal shutdown 5.1.56 thermal shutdown junction temperature t jsd 150 175 200 c 2) 5.1.57 temperature hysteresis t30k 2) 1) the device current measurements for i vs and i fb exclude mosfet driver currents. 2) not subject to production test - specified by design 3) for 4v < v vs < 6v: v gdrv 0v. electrical characteristics: power (cont?d) 5v < v vs < 48v; t j = -40 c to +125 c, all volt ages with respect to ground, po sitive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. ifx80471 electrical characteristics data sheet 15 rev. 1.0, 2011-02-07 5.2 typical performance characteristics typical performanc e characteristics current consumption i vs versus junction temperature t j (inh = on), v vs = 13.5 v current consumption i vout versus junction temperature t j (inh = on), v vout = 5.5 v current consumption i vs versus junction temperature t j (inh = on), v vout = 48 v current consumption i vout vs. junction tempera- ture t j (inh = on), vout = 10 v (ifx80471skv) -50 -20 10 40 70 100 130 160 t j c i vs a 20 30 40 50 60 70 80 90 -50 -20 10 40 70 100 130 160 t j c i vout a 110 120 130 140 150 160 170 180 -50 -20 10 40 70 100 130 160 t j c i vs a 40 50 60 70 80 90 100 110 -50 -20 10 40 70 100 130 160 t j c i vout a 90 100 110 120 130 140 150 160 data sheet 16 rev. 1.0, 2011-02-07 ifx80471 electrical characteristics internal oscillator frequency f osc versus junction temperature t j ) peak current limit threshold voltage v lim versus junction temperature t j minimum on time t min (blanking) versus junction temperature t j gate driver supply v vs - v bds versus junction temperature t j -50 -20 10 40 70 100 130 160 t j c f osc khz 310 320 380 330 340 350 360 370 -50 -20 10 40 70 100 130 160 t j c v lim mv 40 50 60 70 80 90 100 110 -50 -20 10 40 70 100 130 160 t j c t min ns 175 200 350 225 250 275 300 325 -50 -20 10 40 70 100 130 160 t j c v vs -v bds v 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.6 ifx80471 electrical characteristics data sheet 17 rev. 1.0, 2011-02-07 lower reset threshold v fb,rt versus junction temperature t j (ifx80471skv) lower sense threshold v si , low versus junction temperature t j on resistance of si_gnd switch r sw versus junction temperature t j output voltage versus load current (ifx80471skv50) -50 -20 10 40 70 100 130 160 t j c v fb,rt v 1.07 1.08 1.14 1.09 1.10 1.11 1.12 1.13 -50 -20 10 40 70 100 130 160 t j c v si,low v 1.21 1.22 1.23 1.24 1.25 1.26 1.27 1.28 -50 -20 10 40 70 100 130 160 t j c r sw 0 40 280 80 120 160 200 240 0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 i load a v out v 0 1 2 3 4 5 6 7 ifx80471skv50 r sense = 50m v vs = 13.5v app. circuit fig. 6 data sheet 18 rev. 1.0, 2011-02-07 ifx80471 electrical characteristics output voltage vs. load current (ifx80471skv) 0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 i load a v out v out,nom 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 ifx80471skv r sense = 50m v vs = 13.5v app. circuit fig. 5 ifx80471 detailed circuit description data sheet 19 rev. 1.0, 2011-02-07 6 detailed circuit description in the following, the internal blocks of the ifx80471 are described in more detail. for selecting external components please refer to the section ?application information? on page 21 . 6.1 pfm/pwm step-down regulator to meet also high requirements in terms of current co nsumption a special pfm (pulse frequency modulation) - pwm (pulse width modulation) control scheme for highest efficiency is implemented in the ifx80471 regulators. under light load conditions th e output voltage is able to increase slightly and at a ce rtain threshold the controller jumps into pfm mode. in this pfm operation the pmos is triggered with a certain on time (depending on input voltage, output voltage, inductance- and sense resistor va lue) whenever the buck output voltage decreases to the so called wake-threshold. th e switching frequency of the step down regulator is de termined in the pfm mode by the load current. it increases with increasing load current and turns finally to the fix ed pwm frequency at a certain load current depending on the input voltage, current sense resistor and inductance. the diagram below shows the buck regulation circuit of the ifx80471. figure 3 buck control scheme the ifx80471 uses a slope-compensated peak current mode pwm control scheme in which the feedback or output voltage of the step down circ uit and the peak current of the current through the pmos are compared to form the off signal for the external pm os. the on-trigger is set periodically by the internal oscillator when acting in pwm mode and is given by the output of the wake-comparator when operating in pfm mode. the multiplexer (mux) is switched by the output of the mode-detecto r which distinguishes between pfm and pwm by tracking the output voltage (go to pfm) and by tracking the ga te trigger frequency (goto pwm). in pfm mode the peak current limit is reduced to prevent overshoots at the output of the buck regulator. in order to avoid a gate turn off signal due to the current peak caused by the parasitic capacitance of the catch diode the blanking filter is necessary. the blanking time is set internally to 200ns and determines (together with the pmos turn on and turn off delay) the minimum duty cycle of the device. in a ddition to the pfm/pwm regulation scheme an overvoltage lockout and thermal protection are implemented to guaran tee safe operation of the device and of the supplied application circuit. vref vfb vs bds gdrv current- sense amplifier + mux cs vs error amplifier pwm comparator slope- compensation blanking r s q +- + - >1 & +- +- over- voltage lockout over- temp. shutdown vref vfb, ov vref vdiode - + wake- comparator vref vfb, wk oscillator sync mode level- shift pfm pwm data sheet 20 rev. 1.0, 2011-02-07 ifx80471 detailed circuit description 6.2 battery voltage sense to detect undervoltage conditions at the battery a sense comparator block is available within the ifx80471. the voltage at the si input is compared to an internal reference of typ. 1.25v. the output of the comparator drives a nmos structure giving a low signal at so as soon as the voltage at si decreases below this threshold. in the 5v fixed version an internal pull up resistor is connected from the drain of the nmos to the output of the buck converter, in the variable version so is open drain. the sense in voltage divider can be switched to high im pedance by a low signal at the si_enable to avoid high current consumption to gnd (ifx80471skv50 only). of course the sense comparator can be used for any input voltage and does not have to be used for the battery voltage sense only. 6.3 undervoltage reset the output voltage is monitored contin uously by the internal undervoltage reset comparator. as soon as the output voltage decreases below the thresholds given in the char acteristics the npn structur e pulls ro low (latched). in the 5v fixed version an internal pull up resistor is connect ed from the collector of the npn to the output of the buck converter, in the variable version ro is open collector. at power up ro is kept low until the ou tput voltage has reached its reset thre shold and stayed above this threshold for the power on reset delay time. ifx80471 application information data sheet 21 rev. 1.0, 2011-02-07 7 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 7.1 general the ifx80471 step-down dc-dc controllers are designed pr imarily for use in industrial applications and offer a large flexibility in the input voltage range they can handle. using an ex ternal p-mosfet and current-sense resistor allows design flex ibility and the improved effi ciencies associated with high-perfo rmance p-channel mosfets. the unique, peak current-limited, pwm/pfm co ntrol scheme gives these de vices excellent efficiency over wide load ranges, while drawing around 100a current from the battery under no load condition. this wide dynamic range optimizes the ifx80471 for applications, wher e load currents can vary considerably as individual circuit blocks are turned on and off to conserve energy. op eration to a 100% duty cycl e allows the lowest possible dropout voltage, maintaining operation during cold cr anking. high switching frequencies and a simple circuit topology minimize pc board area and component costs. 7.2 output voltage at adjustab le version - feedback divider the output voltage is sensed either by an internal vo ltage divider connected to the vout pin (ifx80471skv50, fixed 5v version) or an external di vider from the buck output voltage to the fb pin (ifx80471skv, adjustable version). the vout pin has to be connected always to th e buck converter output regardless which output voltage for the adjustable version is desired. to determine the resistors of the feedback divider for the desired output voltage v out at the ifx80471skv select r fb2 between 5k and 500k and obtain r fb1 with the follo wing formula: v fb is the threshold of the error amplifier with its value of typical 1.25v which shows that the output voltage can be adjusted in a range from 1.25v to 15v. however the in tegrated reset function will only be operational if the output voltage level is adjusted to >7v. also the current c onsumption will be increased in pfm mode in the range between 1.25v and 7v. 7.3 si_enable connecting si_enable to 5v causes si_gnd to have low impedance. thus th e si comparator is in operation and can be used to monitor the batte ry voltage. so output signal is va lid. connecting si_enable to gnd causes si_gnd to have high impedance. thus the si comparator is not able to monitor the battery voltage. so output signal is invalid. r fb1 r fb2 v out v fb th , ---------------- 1 ? ?? ?? ? = data sheet 22 rev. 1.0, 2011-02-07 ifx80471 application information 7.3.1 battery sense compar ator - voltage divider the formula to calculate the resistor divider for the sens e comparator is basically the same as for the feedback divider in section before. wi th the selected resistor r si2 , the desired threshold of the input voltage v in, uv and the lower sense threshold v si, low the resistor r si1 is given to: for high accuracy and low ohmic resistor divider valu es the on-resistance of the si_gnd nmos (typ. 100 ) has to be added to r si2 . 7.4 undervoltage reset - delay time the diagram below shows the typical behavior of th e reset output in dependency on the input voltage v in , the output voltage v vout or v fb . figure 4 reset timing 7.5 100% duty-cycle operation and dropout the ifx80471 operates with a duty cycle up to 100%. this feature allows to operate wi th the lowest possible drop voltage at low battery voltage as it occurs at cold cr anking. the mosfet is turned on continuously when the supply voltage approaches the output vo ltage level, conventional switching regulators with less than 100% duty cycle would fail in that case. r si1 r si2 v in uv , v si low , ------------------ -1 ? ?? ?? ? = t t t v vout, rt v fb,rt t rr < t rr t t rd thermal shutdown under voltage over load t rd t rd t rd v rd, ut v rd, lt v in v vout v fb v rd v ro ifx80471 application information data sheet 23 rev. 1.0, 2011-02-07 the drop- or dropout voltage is defined as the difference between the input and output voltage levels when the input is low enough to drop the output out of regulation . dropout depends on the mosfet drain-to-source on- resistance, the current-sense resistor and the inductor seri es resistance. it is propor tional to the load current: 7.6 sync input and frequency control the ifx80471?s inte rnal oscillator is set for a fixed pwm switchi ng frequency of 360khz or can be synchronized to an external clock at the sync pin. when the intern al clock is used sync has to be connected to gnd. sync is a negative-edge triggered input that allows synchron ization to an external frequency ranging between 270khz and 530khz. when sync is clocked by an external signal, the converter operates in pwm mode until the load current drops below the pwm to pfm threshold. therea fter the converter continues operation in pfm mode. 7.7 shutdown mode connecting enable to gnd places th e ifx80471skv in shutdown mode. in shutdown, th e reference, control circuitry, external switching mosfet, and the oscillator are turned off and th e output falls to 0v. connect enable to voltages higher than 4.5v for normal operation. as this input operates analogue way the voltage applied at this pin should have a slope of 0.5v/3s as a minimum r equirement to avoid undefined states within the device. 7.8 buck conver ter circuit a typical choice of external components fo r the buck converter circuit is given in figure 5 and figure 6 . for basic operation of the buck conver ter the input capacitors c in1 , c in2 , the driver supply capacitor c bds , the sense resistor r sense , the pmos device, the catch diode d1, the inductance l1 and th e output capacitor c out are necessary. in addition for low electromagnetic emission a pi-filter at the input and/or a small resistor in the path between gdrv and the gate of the pmos may be necessary. 7.8.1 buck inductance (l 1) selection in terms of ripple current the internal pwm/pfm control loop includes a slope comp ensation for stable operation in pwm mode. this slope compensation is optimized for inductance values of 47h and sense resistor values of 47m for the 5v output voltage versions. when choosing an inductance different from 47h the sense resistor has to be changed also: increasing this ratio above 1000 /h may result in sub harmonic oscillati ons as well-known for peak current mode regulators without integrated slope compensation. to achieve the same effect of slope compensation in the adjustable voltage version also the inductance in h is given by v drop i load r ds on () pmos r sense r inductance ++ () ? = r sense l1 ------------------- ( 0 , 5 . . . 1 , 0 ) 3 10 h ---- = data sheet 24 rev. 1.0, 2011-02-07 ifx80471 application information the inductance value determines together with the input vo ltage, the output voltage and the switching frequency the current ripple which occurs during normal operation of the step down converter. this current ripple is important for the all over ripple at the output of the switching converter. in this equation f sw is the actual switching frequency of the device, given either by the internal oscillator or by an external source connected to the sync pin. when pickin g finally the inductance of a certain supplier (epcos, coilcraft etc.) the saturation current has to be considered. the saturation current value of the desired inductance has to be higher than the maximum peak current which can appear in the actual application. 7.8.2 determining the current limit the peak current which the buck converter is able to pr ovide is determined by the peak current limit threshold voltage v lim and the sense resistor r sense . with a maximum peak current given by the application (i peak, pwm =i load +0.5 i) the sense resistor is calculated to the equation above takes account for the foldback characterist ic of the current limit as shown in the figures ?output voltage versus load current? on page 17/18 by introduc ing a factor of 2. it must be assured by correct dimensioning of r sense that the load current doesn?t reach the fo ldback part of the characteristic curve. 7.8.3 pfm and pwm thresholds the crossover thresholds pfm to pwm and vice versa strongly depend on the input voltage v in , the buck converter inductance l1, the sense resistor value r sense and the turn on and turn off delays of the external pmos. 7.8.4 buck output capacitor (c out ) selection: the choice of the output capacitor effe cts straight to the minimum achievable ri pple which is seen at the output of the buck converter. in continuous conduction mode the ripple of the output voltage can be estimated by the following equation: 2,0 10 4 ? h v -------- - v out r sense ?? ? ?? ?? l1 4,0 10 4 ? h v -------- - v ? out r sense ?? ?? ?? << i v in v out ? () v out ? f sw v in l1 ?? ------------------------------------------------------ = r sense v lim 2i ? peak pwm , ------------------------------------ - = v ripple ir esrcout 1 8f sw c out ?? ----------------------------------- - + ?? ?? ? = ifx80471 application information data sheet 25 rev. 1.0, 2011-02-07 from the formula it is recognized that the esr has a big influence in the total ripple at the output, so low esr tantalum or ceramic capacitors are recommended fo r the application (recomme nded range: 50mohm to 150mohm). one other important thing to note are the requirements fo r the resonant frequency of the output lc-combination. the choice of the components l and c have to meet also the specified range given in chapter 4.2 otherwise instabilities of the regulation loop might occur. 7.8.5 input capacitor (c in1 ) selection: at high load currents, where the current through the indu ctance flows continuously, th e input capacitor is exposed to a square wave current with its duty cycle v out /v i . to prevent a high ripple to the battery line a capacitor with low esr should be used. the maximu m rms current which the capacitor ha s to withstand is calculated to: for low esr an e.g. al-electrolytic capacitance in parallel to an ceramic capacitance could be used. 7.8.6 freewheeling diode / catch diode (d1) for lowest power loss in the freewheeling path schottky diodes are recommended. with those types the reverse recovery charge is negligible and a fast hand over from freewheeling to forward conduction mode is possible. depending on the application (12v battery systems) 40v types could be also used instead of the 60v diodes. also for high temperature operation select a schottky-diode with low reverse leakage. a fast recovery diode with recovery times in the range of 30ns can be also used if smaller junction capacitance values (smaller spikes) are desired. 7.8.7 buck driver supply capacitor (c bds ) the voltage at the ceramic capacitor is clamped interna lly to 7v, a ceramic type with a minimum of 220nf and voltage class 16v would be sufficient. 7.8.8 input pi-filter components for reduced eme at the input of buck converters a square wave current is observed causing electromagnetic interference on the battery line. the emission to the battery line consists on one hand of components of the switching frequency (fundamental wave) and its harmonics and on the other hand of the high frequency components derived from the current slope. for proper attenu ation of those interferers a -type input filter structure is recommended which is built up with inductive and capacitive comp onents in addition to the input caps c in1 and c in2 . the inductance can be chosen up to the value of the buck converter inductance, higher values might not be necessary, the additional capacitance should be a ceramic type in the range up to 100nf. inexpensive input filters show due to their parasitics a notch filter characteristic, which means basically that the low pass filter acts from a certain frequency as a high pass filter and means furthe r that the high frequency components are not attenuated properly. to slower down the slopes at the gate of the pmos switch and get down the emission in the high frequency range a small gate resistor can be put between gdrv and the pmos gate. 7.8.9 frequency compensation the external frequency compensation pin should be connected via a 22nf ( > 10v) ceramic capacitor and a 430 (1/8w) resistor to gnd. this node sh ould be kept free from switching noise. i rms i load v out v in -------------- 1 1 3 -- - i 2i load ? ----------------------- ?? ?? 2 ? + ?? = data sheet 26 rev. 1.0, 2011-02-07 ifx80471 application information 7.9 components recommendation - overview 7.10 layout recommendation the most sensitive points for buck converters - when co nsidering the layout - are the nodes at the input, output and the gate of the pmos tr ansistor and the feedback path. for proper operation and to avoid stray inductance paths the external catch diode, the buck inductance and the input capacitor c in1 have to be connected as close as possible to the pmos device. also th e gdrv path from the controller to the mosfet has to be as short as possible. best suitable for the connection of the cathode of the catch diode and one terminal of the inductance would be a small plain located next to the drain of the pmos. the gnd connection of the catch diode must be also as short as possible. in general the gnd level should be implemented as surface area over the whole pcb as seco nd layer, if necessary as third layer. the feedback path has to be well grounded also, a ceramic capacitance might help in addition to the output cap to avoid spikes. to obtain the optimum filt er capability of the input pi-filter it has to be located also as close as possible to the input. to filter the supply input of the device (vs) the ceramic cap should be connected directly to the pin. as a guideline an emc optimized app lication board / layout is available. device values / remarks c in1 100 f, 60v c in2 220nf, 60v l1 47 h, 1.6a, 145m 47 h, 3.5a, 47m 47 h, 3.8a, 110m 68 h, 3.5a, 130m 47 h, 4.0a, 97m m1 60v, 3.44a, 130m , nl 60v, 2.9a, 130m , nl 60v, 9a, 250m , ll c bds 220nf, 16v d1 schottky, 60v, 3a schottky, 40v, 3a schottky, 40v, 3a c out low esr tantalum, 100 f, 10v c comp see 7.8.9. ifx80471 application information data sheet 27 rev. 1.0, 2011-02-07 figure 5 application diagram circuit ifx80471skv figure 6 application diagra m circuit ifx80471skv50 note: this is a very simplified example of an application ci rcuit. the function must be verified in the real application. m1 d1 c out = 100 f v out c bd s = 220 nf v in l 1 = 47 h ifx80471skv gdrv bds vout gnd enable c in1 = 100 f on off cs r sen se = 47m m1: infineon bso 613spv or infineon bsp 613p r si 1 = 400k c in2 = 220nf r si 2 = 100k fb so ro sync comp r fb 2 = 47k 11 13 7 si vs 14 12 3 9 2 8 10 4 5 1 si_gnd 6 to e.g. 5v rail r so = r ro = 20k to c to c r fb 1 = 330k 430 22nf m1 d1 c out = 100 f v out c bd s = 220 nf v in l 1 = 47 h gdrv bds fb gnd si_enable vs c in1 = 100 f on off cs r sen se = 47m m1: infineon bso 613spv or infi neon bsp 613p si_gnd si r si 1 = 400k c in2 = 220nf r si 2 = 100k comp so ro sync v out i out ifx80471skv50 11 14 12 2 3 9 8 10 4 5 1 7 13 6 vout 430 22nf data sheet 28 rev. 1.0, 2011-02-07 ifx80471 package outlines 8 package outlines figure 7 pg-dso-14 green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). 1) does not include plastic or metal protrusion of 0.15 max. per side 2) lead width can be 0.61 max. in dambar area -0.2 8.75 1) 0.64 0.19 +0.06 index marking 1.27 +0.10 0.41 0.1 1 14 2) 7 14x 8 0.175 (1.47) 0.07 0.2 6 0.35 x 45? -0.2 1.75 max. 4 1) 0.25 8?max. -0.06 0.2 m ab m 0.2 c c b a gps01230 for further information on alternativ e packages, please vi sit our website: http://www.infineon.com/packages . dimensions in mm ifx80471 revision history data sheet 29 rev. 1.0, 2011-02-07 9 revision history revision date changes 1.0 2011-02-07 data sheet - initial release edition 2011-02-07 published by infineon technologies ag 81726 munich, germany ? 2011 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. the infineon technologies component described in this data sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applic ations or systems only with the express written approval of infineon technologies, if a failure of such component s can reasonably be expected to cause the failure of that life-support automotive, aviation and aerospace device or sy stem or to affect the safety or effectiveness of that device or system. life support devices or systems are in tended to be implanted in the human body or to support and/or maintain and sustain and/or protec t human life. if they fail, it is reaso nable to assume that the health of the user or other persons may be endangered. mouser electronics authorized distributor click to view pricing, inventory, delivery & lifecycle information: infineon: ? ifx80471sk v? ifx80471sk v50 |
Price & Availability of IFX80471SK-V
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |